# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		single_cycle_datapath_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name DEVICE EP2C20F484C7
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name TOP_LEVEL_ENTITY single_cycle_datapath
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:50:09  APRIL 05, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 7.2
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_location_assignment PIN_J2 -to Hex0_A
set_location_assignment PIN_J1 -to Hex0_B
set_location_assignment PIN_H2 -to Hex0_C
set_location_assignment PIN_H1 -to Hex0_D
set_location_assignment PIN_F2 -to Hex0_E
set_location_assignment PIN_F1 -to Hex0_F
set_location_assignment PIN_E2 -to Hex0_G
set_location_assignment PIN_E1 -to Hex1_A
set_location_assignment PIN_H6 -to Hex1_B
set_location_assignment PIN_H5 -to Hex1_C
set_location_assignment PIN_H4 -to Hex1_D
set_location_assignment PIN_G3 -to Hex1_E
set_location_assignment PIN_D2 -to Hex1_F
set_location_assignment PIN_D1 -to Hex1_G
set_location_assignment PIN_G5 -to Hex2_A
set_location_assignment PIN_G6 -to Hex2_B
set_location_assignment PIN_C2 -to Hex2_C
set_location_assignment PIN_C1 -to Hex2_D
set_location_assignment PIN_E3 -to Hex2_E
set_location_assignment PIN_E4 -to Hex2_F
set_location_assignment PIN_D3 -to Hex2_G
set_location_assignment PIN_F4 -to Hex3_A
set_location_assignment PIN_D5 -to Hex3_B
set_location_assignment PIN_D6 -to Hex3_C
set_location_assignment PIN_J4 -to Hex3_D
set_location_assignment PIN_L8 -to Hex3_E
set_location_assignment PIN_F3 -to Hex3_F
set_location_assignment PIN_D4 -to Hex3_G
set_location_assignment PIN_R22 -to Key_0
set_location_assignment PIN_R21 -to Key_1
set_location_assignment PIN_T22 -to Key_2
set_location_assignment PIN_T21 -to Key_3
set_location_assignment PIN_AB5 -to SRAM_CE_N
set_location_assignment PIN_Y7 -to SRAM_LB_N
set_location_assignment PIN_T8 -to SRAM_OE_N
set_location_assignment PIN_W7 -to SRAM_UB_N
set_location_assignment PIN_AA10 -to SRAM_WE_N
set_location_assignment PIN_L22 -to Sw0
set_location_assignment PIN_L21 -to Sw1
set_location_assignment PIN_M22 -to Sw2
set_location_assignment PIN_V12 -to Sw3
set_location_assignment PIN_W12 -to Sw4
set_location_assignment PIN_U12 -to Sw5
set_location_assignment PIN_U11 -to Sw6
set_location_assignment PIN_M2 -to Sw7
set_location_assignment PIN_M1 -to Sw8
set_location_assignment PIN_L2 -to Sw9
set_location_assignment PIN_R17 -to LEDR[9]
set_location_assignment PIN_R18 -to LEDR[8]
set_location_assignment PIN_U18 -to LEDR[7]
set_location_assignment PIN_Y18 -to LEDR[6]
set_location_assignment PIN_V19 -to LEDR[5]
set_location_assignment PIN_T18 -to LEDR[4]
set_location_assignment PIN_Y19 -to LEDR[3]
set_location_assignment PIN_U19 -to LEDR[2]
set_location_assignment PIN_R19 -to LEDR[1]
set_location_assignment PIN_R20 -to LEDR[0]
set_location_assignment PIN_A12 -to FPGA_Clock
set_location_assignment PIN_AA3 -to SRAM_Addr[0]
set_location_assignment PIN_AB3 -to SRAM_Addr[1]
set_location_assignment PIN_AA4 -to SRAM_Addr[2]
set_location_assignment PIN_AB4 -to SRAM_Addr[3]
set_location_assignment PIN_AA5 -to SRAM_Addr[4]
set_location_assignment PIN_AB10 -to SRAM_Addr[5]
set_location_assignment PIN_AA11 -to SRAM_Addr[6]
set_location_assignment PIN_AB11 -to SRAM_Addr[7]
set_location_assignment PIN_V11 -to SRAM_Addr[8]
set_location_assignment PIN_W11 -to SRAM_Addr[9]
set_location_assignment PIN_R11 -to SRAM_Addr[10]
set_location_assignment PIN_T11 -to SRAM_Addr[11]
set_location_assignment PIN_Y10 -to SRAM_Addr[12]
set_location_assignment PIN_U10 -to SRAM_Addr[13]
set_location_assignment PIN_R10 -to SRAM_Addr[14]
set_location_assignment PIN_T7 -to SRAM_Addr[15]
set_location_assignment PIN_Y6 -to SRAM_Addr[16]
set_location_assignment PIN_Y5 -to SRAM_Addr[17]
set_location_assignment PIN_U8 -to SRAM_Data[15]
set_location_assignment PIN_V8 -to SRAM_Data[14]
set_location_assignment PIN_W8 -to SRAM_Data[13]
set_location_assignment PIN_R9 -to SRAM_Data[12]
set_location_assignment PIN_U9 -to SRAM_Data[11]
set_location_assignment PIN_V9 -to SRAM_Data[10]
set_location_assignment PIN_W9 -to SRAM_Data[9]
set_location_assignment PIN_Y9 -to SRAM_Data[8]
set_location_assignment PIN_AB9 -to SRAM_Data[7]
set_location_assignment PIN_AA9 -to SRAM_Data[6]
set_location_assignment PIN_AB8 -to SRAM_Data[5]
set_location_assignment PIN_AA8 -to SRAM_Data[4]
set_location_assignment PIN_AB7 -to SRAM_Data[3]
set_location_assignment PIN_AA7 -to SRAM_Data[2]
set_location_assignment PIN_AB6 -to SRAM_Data[1]
set_location_assignment PIN_AA6 -to SRAM_Data[0]
set_global_assignment -name FMAX_REQUIREMENT "50 MHz" -section_id "FPGA Clock"
set_instance_assignment -name CLOCK_SETTINGS "FPGA Clock" -to FPGA_Clock
set_global_assignment -name FMAX_REQUIREMENT "1 MHz" -section_id "CPU Clock"
set_instance_assignment -name CLOCK_SETTINGS "CPU Clock" -to Key_0
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS OUTPUT DRIVING AN UNSPECIFIED SIGNAL"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
set_global_assignment -name OUTPUT_PIN_LOAD 1 -section_id "3.3-V LVTTL"
set_location_assignment PIN_U22 -to LEDG[0]
set_location_assignment PIN_U21 -to LEDG[1]
set_location_assignment PIN_V22 -to LEDG[2]
set_location_assignment PIN_Y21 -to LEDG[7]
set_location_assignment PIN_Y22 -to LEDG[6]
set_location_assignment PIN_W21 -to LEDG[5]
set_location_assignment PIN_W22 -to LEDG[4]
set_location_assignment PIN_V21 -to LEDG[3]
set_global_assignment -name VERILOG_FILE hex2sevenseg.v
set_global_assignment -name BDF_FILE single_cycle_datapath.bdf
set_global_assignment -name VERILOG_FILE PC_Register.v
set_global_assignment -name VERILOG_FILE instruction_memory.v
set_global_assignment -name VERILOG_FILE Register_File.v
set_global_assignment -name VERILOG_FILE ALU.v
set_global_assignment -name VERILOG_FILE control_unit.v
set_global_assignment -name VERILOG_FILE data_memory.v
set_global_assignment -name VERILOG_FILE add4.v
set_global_assignment -name VERILOG_FILE alu_control.v
set_global_assignment -name VERILOG_FILE calc_bta.v
set_global_assignment -name VERILOG_FILE calc_jump_address.v
set_global_assignment -name VERILOG_FILE sign_extend_1632.v
set_global_assignment -name VERILOG_FILE two_by_5_mux.v
set_global_assignment -name VERILOG_FILE two_by_16_mux.v
set_global_assignment -name VERILOG_FILE two_by_32_mux.v
set_global_assignment -name VERILOG_FILE eight_by_16_mux.v
set_global_assignment -name VERILOG_FILE pc_mux.v
set_global_assignment -name VERILOG_FILE ledg_buffers.v
set_global_assignment -name VERILOG_FILE ledr_buffers.v
set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"