Version 7.2 Build 151 09/26/2007 SJ Full Version
11
989
OFF
OFF
OFF
OFF
ON
ON
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
single_cycle_datapath
# storage
db|single_cycle_datapath.(0).cnf
db|single_cycle_datapath.(0).cnf
# case_insensitive
# source_file
single_cycle_datapath.bdf
2e1857f5a070488b1d9d1eacda35fc31
25
# internal_option {
BLOCK_DESIGN_NAMING
OFF
}
# hierarchies {
|
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
hex2sevenseg
# storage
db|single_cycle_datapath.(1).cnf
db|single_cycle_datapath.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
hex2sevenseg.v
fecacacbd7f2d592e795af273b8f2c4
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
hex2sevenseg:Hex3
hex2sevenseg:Hex2
hex2sevenseg:Hex1
hex2sevenseg:Hex0
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
Two_by_16_mux
# storage
db|single_cycle_datapath.(2).cnf
db|single_cycle_datapath.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
two_by_16_mux.v
7aff91dde7b631151a113f41d4705a83
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
Two_by_16_mux:inst23
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
Eight_by_16_mux
# storage
db|single_cycle_datapath.(3).cnf
db|single_cycle_datapath.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
eight_by_16_mux.v
ce393acbaaa45c4560ca1d38ed446a1
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
Eight_by_16_mux:inst
Eight_by_16_mux:inst6
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
PC_Register
# storage
db|single_cycle_datapath.(4).cnf
db|single_cycle_datapath.(4).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
PC_Register.v
f05b3693a31de61e8b56692a72edfb
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
PC_Register:inst2
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
pc_mux
# storage
db|single_cycle_datapath.(5).cnf
db|single_cycle_datapath.(5).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
pc_mux.v
af7c36ade34e71be5ccf609bb134b2
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
pc_mux:inst44
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
control_unit
# storage
db|single_cycle_datapath.(6).cnf
db|single_cycle_datapath.(6).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
control_unit.v
d743a044905c2ef51e57e544169c
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
control_unit:inst34
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
Instruction_Memory
# storage
db|single_cycle_datapath.(7).cnf
db|single_cycle_datapath.(7).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
instruction_memory.v
84194625eb867f1bcd342b97c5491c82
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
Instruction_Memory:inst4
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
ALU
# storage
db|single_cycle_datapath.(8).cnf
db|single_cycle_datapath.(8).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
ALU.v
8a139f66ad2883b14d41661ce07c3d9b
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
ALU:inst31
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
Register_File
# storage
db|single_cycle_datapath.(9).cnf
db|single_cycle_datapath.(9).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
Register_File.v
7445d0b163be17189526bcecbe23fec7
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
Register_File:inst29
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
Two_by_32_mux
# storage
db|single_cycle_datapath.(10).cnf
db|single_cycle_datapath.(10).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
two_by_32_mux.v
0882e9fb2ced9a9bc14e528452d122
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
Two_by_32_mux:inst7
Two_by_32_mux:inst24
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
Data_Memory
# storage
db|single_cycle_datapath.(11).cnf
db|single_cycle_datapath.(11).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
data_memory.v
4c8b5c1a88f02919f4ae66693922f10
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
s_idle
000
PARAMETER_UNSIGNED_BIN
USR
s_read_lower
001
PARAMETER_UNSIGNED_BIN
USR
s_read_upper
010
PARAMETER_UNSIGNED_BIN
USR
s_write_lower
101
PARAMETER_UNSIGNED_BIN
USR
s_write_upper
110
PARAMETER_UNSIGNED_BIN
USR
s_wait_cpu
111
PARAMETER_UNSIGNED_BIN
USR
}
# hierarchies {
Data_Memory:inst26
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
Two_by_5_mux
# storage
db|single_cycle_datapath.(12).cnf
db|single_cycle_datapath.(12).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
two_by_5_mux.v
f53a71c7d180f896da99e152ce9a23
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
Two_by_5_mux:inst22
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sign_extend_1632
# storage
db|single_cycle_datapath.(13).cnf
db|single_cycle_datapath.(13).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
sign_extend_1632.v
85ef4128e81ce241febda5231010357e
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
sign_extend_1632:inst21
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
alu_control
# storage
db|single_cycle_datapath.(14).cnf
db|single_cycle_datapath.(14).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
alu_control.v
6c4d5914402aa2e47ab3cfa0e318c8a6
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
alu_control:inst33
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
calc_BranchTargetAddress
# storage
db|single_cycle_datapath.(15).cnf
db|single_cycle_datapath.(15).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
calc_bta.v
59ab4da2cafa20d59e9af71ee43f4e8
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
calc_BranchTargetAddress:inst32
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add4
# storage
db|single_cycle_datapath.(16).cnf
db|single_cycle_datapath.(16).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
add4.v
db649e20f25801b136ec196a53bcfcb
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
add4:inst17
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
calc_JumpAddress
# storage
db|single_cycle_datapath.(17).cnf
db|single_cycle_datapath.(17).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
calc_jump_address.v
927db969757d22337505a3c5070726
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
calc_JumpAddress:inst40
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
ledg_buffers
# storage
db|single_cycle_datapath.(18).cnf
db|single_cycle_datapath.(18).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
ledg_buffers.v
2e983b664dead24a936f48ebe3d6cb1
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
ledg_buffers:inst1
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
ledr_buffers
# storage
db|single_cycle_datapath.(19).cnf
db|single_cycle_datapath.(19).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
ledr_buffers.v
97d3eeb363f9766f58c6426bf607bff
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
ledr_buffers:inst3
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# complete

